﻿/**
 *******************************************************************************
 * @file  main.c
 * @brief Main program.
 @verbatim
   Change Logs:
   Date             Author          Notes
   2024-10-29       CDT             First version
 @endverbatim
 *******************************************************************************
 * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd. All rights reserved.
 *
 * This software component is licensed by XHSC under BSD 3-Clause license
 * (the "License"); You may not use this file except in compliance with the
 * License. You may obtain a copy of the License at:
 *                    opensource.org/licenses/BSD-3-Clause
 *
 *******************************************************************************
 */

/*******************************************************************************
 * Include files
 ******************************************************************************/
#include "main.h"

/*******************************************************************************
 * Local type definitions ('typedef')
 ******************************************************************************/

/*******************************************************************************
 * Local pre-processor symbols/macros ('#define')
 ******************************************************************************/
/*******************************************************************************
 * Global variable definitions (declared in header file with 'extern')
 ******************************************************************************/

/*******************************************************************************
 * Local function prototypes ('static')
 ******************************************************************************/
/* INT_SRC_PORT_EIRQ8 Callback. */
static void INT_SRC_PORT_EIRQ8_IrqCallback(void);
/* INT_SRC_PORT_EIRQ0 Callback. */
static void INT_SRC_PORT_EIRQ0_IrqCallback(void);
/* INT_SRC_USART2_RTO Callback. */
static void INT_SRC_USART2_RTO_IrqCallback(void);
/* INT_SRC_USART3_TCI Callback. */
static void INT_SRC_USART3_TCI_IrqCallback(void);
/* INT_SRC_USART3_RI Callback. */
static void INT_SRC_USART3_RI_IrqCallback(void);
/* INT_SRC_USART6_TCI Callback. */
static void INT_SRC_USART6_TCI_IrqCallback(void);
/* INT_SRC_USART6_RTO Callback. */
static void INT_SRC_USART6_RTO_IrqCallback(void);
/* INT_SRC_USART9_TCI Callback. */
static void INT_SRC_USART9_TCI_IrqCallback(void);
/* INT_SRC_SPI1_SPTI Callback. */
static void INT_SRC_SPI1_SPTI_IrqCallback(void);
/* INT_SRC_SPI1_SPRI Callback. */
static void INT_SRC_SPI1_SPRI_IrqCallback(void);
/* INT_SRC_USART2_RI Callback. */
static void INT_SRC_USART2_RI_IrqCallback(void);
/* INT_SRC_USART6_RI Callback. */
static void INT_SRC_USART6_RI_IrqCallback(void);
/* INT_SRC_USART9_RI Callback. */
static void INT_SRC_USART9_RI_IrqCallback(void);
/* INT_SRC_RTC_ALM Callback. */
static void INT_SRC_RTC_ALM_IrqCallback(void);
/* INT_SRC_I2C2_RXI Callback. */
static void INT_SRC_I2C2_RXI_IrqCallback(void);
/* INT_SRC_I2C2_TXI Callback. */
static void INT_SRC_I2C2_TXI_IrqCallback(void);
/* INT_SRC_I2C4_TXI Callback. */
static void INT_SRC_I2C4_TXI_IrqCallback(void);
/* INT_SRC_I2C4_RXI Callback. */
static void INT_SRC_I2C4_RXI_IrqCallback(void);
/* INT_SRC_DMA1_TC0 Callback. */
static void INT_SRC_DMA1_TC0_IrqCallback(void);
/* INT_SRC_DMA1_TC1 Callback. */
static void INT_SRC_DMA1_TC1_IrqCallback(void);
/* INT_SRC_DMA1_TC2 Callback. */
static void INT_SRC_DMA1_TC2_IrqCallback(void);
/* INT_SRC_DMA1_TC3 Callback. */
static void INT_SRC_DMA1_TC3_IrqCallback(void);
/* INT_SRC_DMA1_TC4 Callback. */
static void INT_SRC_DMA1_TC4_IrqCallback(void);
/* INT_SRC_DMA1_TC5 Callback. */
static void INT_SRC_DMA1_TC5_IrqCallback(void);
/* INT_SRC_DMA1_TC6 Callback. */
static void INT_SRC_DMA1_TC6_IrqCallback(void);
/* INT_SRC_DMA1_TC7 Callback. */
static void INT_SRC_DMA1_TC7_IrqCallback(void);
/* INT_SRC_DMA2_TC0 Callback. */
static void INT_SRC_DMA2_TC0_IrqCallback(void);
/* INT_SRC_DMA2_TC1 Callback. */
static void INT_SRC_DMA2_TC1_IrqCallback(void);
/* INT_SRC_DMA2_TC2 Callback. */
static void INT_SRC_DMA2_TC2_IrqCallback(void);
/* INT_SRC_DMA2_TC3 Callback. */
static void INT_SRC_DMA2_TC3_IrqCallback(void);
/* INT_SRC_DMA2_TC4 Callback. */
static void INT_SRC_DMA2_TC4_IrqCallback(void);
/* INT_SRC_DMA2_TC5 Callback. */
static void INT_SRC_DMA2_TC5_IrqCallback(void);
/* INT_SRC_DMA2_TC6 Callback. */
static void INT_SRC_DMA2_TC6_IrqCallback(void);
/* INT_SRC_DMA2_TC7 Callback. */
static void INT_SRC_DMA2_TC7_IrqCallback(void);
/* INT_SRC_CAN2_HOST Callback. */
static void INT_SRC_CAN2_HOST_IrqCallback(void);
/* INT_SRC_USART2_TCI Callback. */
static void INT_SRC_USART2_TCI_IrqCallback(void);
/* INT_SRC_RTC_PRD Callback. */
static void INT_SRC_RTC_PRD_IrqCallback(void);
/* INT_SRC_SPI1_SPII Callback. */
static void INT_SRC_SPI1_SPII_IrqCallback(void);
/* INT_SRC_TMR2_1_CMP_A Callback. */
static void INT_SRC_TMR2_1_CMP_A_IrqCallback(void);
/* INT_SRC_USART7_RTO Callback. */
static void INT_SRC_USART7_RTO_IrqCallback(void);
/* INT_SRC_USART7_EI Callback. */
static void INT_SRC_USART7_EI_IrqCallback(void);
/* INT_SRC_USART7_TCI Callback. */
static void INT_SRC_USART7_TCI_IrqCallback(void);
/* INT_SRC_USART7_RI Callback. */
static void INT_SRC_USART7_RI_IrqCallback(void);
/* INT_SRC_I2C4_TEI Callback. */
static void INT_SRC_I2C4_TEI_IrqCallback(void);
/* INT_SRC_I2C2_TEI Callback. */
static void INT_SRC_I2C2_TEI_IrqCallback(void);
/* INT_SRC_TMR2_2_CMP_A Callback. */
static void INT_SRC_TMR2_2_CMP_A_IrqCallback(void);
/* Configures EIRQ. */
static void App_EIRQCfg(void);
/* Configures SDIOx. */
static void App_SDIOxCfg(void);
/* Configures USB_FS. */
static void App_USB_FSCfg(void);
/* Configures USB_HS. */
static void App_USB_HSCfg(void);
/* Configures ETHMAC. */
static void App_ETHMACCfg(void);
/* Configures EXMC. */
static void App_EXMCCfg(void);
/* Configures Timer2. */
static void App_Timer2Cfg(void);
/* Configures Timer0. */
static void App_Timer0Cfg(void);
/* Configures USARTx. */
static void App_USARTxCfg(void);
/* Configures I2Cx. */
static void App_I2CxCfg(void);
/* Configures SPIx. */
static void App_SPIxCfg(void);
/* Configures RTC. */
static void App_RTCCfg(void);
/* Configures CANx. */
static void App_CANxCfg(void);
/* Configures SWDT. */
static void App_SWDTCfg(void);
/*******************************************************************************
 * Local variable definitions ('static')
 ******************************************************************************/

/*******************************************************************************
 * Function implementation - global ('extern') and local ('static')
 ******************************************************************************/
//Clock Config
static void App_ClkCfg(void)
{
    /* Set bus clock div. */
    CLK_SetClockDiv(CLK_BUS_CLK_ALL, (CLK_HCLK_DIV1 | CLK_EXCLK_DIV2 | CLK_PCLK0_DIV1 | CLK_PCLK1_DIV2 | \
                                   CLK_PCLK2_DIV4 | CLK_PCLK3_DIV4 | CLK_PCLK4_DIV2));
    /* sram init include read/write wait cycle setting */
    SRAM_SetWaitCycle(SRAM_SRAM_ALL, SRAM_WAIT_CYCLE1, SRAM_WAIT_CYCLE1);
    SRAM_SetWaitCycle(SRAM_SRAMH, SRAM_WAIT_CYCLE0, SRAM_WAIT_CYCLE0);
    /* flash read wait cycle setting */
    EFM_SetWaitCycle(EFM_WAIT_CYCLE5);
    /* XTAL config */
    stc_clock_xtal_init_t stcXtalInit;
    (void)CLK_XtalStructInit(&stcXtalInit);
    stcXtalInit.u8State = CLK_XTAL_ON;
    stcXtalInit.u8Drv = CLK_XTAL_DRV_HIGH;
    stcXtalInit.u8Mode = CLK_XTAL_MD_OSC;
    stcXtalInit.u8StableTime = CLK_XTAL_STB_2MS;
    (void)CLK_XtalInit(&stcXtalInit);
    /* PLLH config */
    stc_clock_pll_init_t stcPLLHInit;
    (void)CLK_PLLStructInit(&stcPLLHInit);
    stcPLLHInit.PLLCFGR = 0UL;
    stcPLLHInit.PLLCFGR_f.PLLM = (1UL - 1UL);
    stcPLLHInit.PLLCFGR_f.PLLN = (48UL - 1UL);
    stcPLLHInit.PLLCFGR_f.PLLP = (5UL - 1UL);
    stcPLLHInit.PLLCFGR_f.PLLQ = (10UL - 1UL);
    stcPLLHInit.PLLCFGR_f.PLLR = (16UL - 1UL);
    stcPLLHInit.u8PLLState = CLK_PLL_ON;
    stcPLLHInit.PLLCFGR_f.PLLSRC = CLK_PLL_SRC_XTAL;
    (void)CLK_PLLInit(&stcPLLHInit);
    /* PLLA config */
    stc_clock_pllx_init_t stcPLLAInit;
    (void)CLK_PLLxStructInit(&stcPLLAInit);
    stcPLLAInit.PLLCFGR = 0UL;
    stcPLLAInit.PLLCFGR_f.PLLM = (5UL - 1UL);
    stcPLLAInit.PLLCFGR_f.PLLN = (48UL - 1UL);
    stcPLLAInit.PLLCFGR_f.PLLP = (16UL - 1UL);
    stcPLLAInit.PLLCFGR_f.PLLQ = (16UL - 1UL);
    stcPLLAInit.PLLCFGR_f.PLLR = (5UL - 1UL);
    stcPLLAInit.u8PLLState = CLK_PLLX_ON;
    (void)CLK_PLLxInit(&stcPLLAInit);
    /* 4 cycles for 200MHz ~ 250MHz */
    GPIO_SetReadWaitCycle(GPIO_RD_WAIT4);
    /* Set the system clock source */
    CLK_SetSysClockSrc(CLK_SYSCLK_SRC_PLL);
}

//Port Config
static void App_PortCfg(void)
{
    /* GPIO initialize */
    stc_gpio_init_t stcGpioInit;
    /* PC13 set to GPIO-Output */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinDir = PIN_DIR_OUT;
    stcGpioInit.u16PinAttr = PIN_ATTR_DIGITAL;
    (void)GPIO_Init(GPIO_PORT_C, GPIO_PIN_13, &stcGpioInit);

    /* PC14 set to XTAL32-OUT */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinAttr = PIN_ATTR_ANALOG;
    (void)GPIO_Init(GPIO_PORT_C, GPIO_PIN_14, &stcGpioInit);

    /* PC15 set to XTAL32-IN */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinAttr = PIN_ATTR_ANALOG;
    (void)GPIO_Init(GPIO_PORT_C, GPIO_PIN_15, &stcGpioInit);

    /* PF10 set to GPIO-Output */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinDir = PIN_DIR_OUT;
    stcGpioInit.u16PinDrv = PIN_HIGH_DRV;
    stcGpioInit.u16PinAttr = PIN_ATTR_DIGITAL;
    (void)GPIO_Init(GPIO_PORT_F, GPIO_PIN_10, &stcGpioInit);

    /* PC0 set to EIRQ0 */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16ExtInt = PIN_EXTINT_ON;
    stcGpioInit.u16PullUp = PIN_PU_ON;
    (void)GPIO_Init(GPIO_PORT_C, GPIO_PIN_00, &stcGpioInit);

    /* PA6 set to GPIO-Output */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinDir = PIN_DIR_OUT;
    stcGpioInit.u16PinAttr = PIN_ATTR_DIGITAL;
    (void)GPIO_Init(GPIO_PORT_A, GPIO_PIN_06, &stcGpioInit);

    /* PB1 set to GPIO-Output */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinDir = PIN_DIR_OUT;
    stcGpioInit.u16PinAttr = PIN_ATTR_DIGITAL;
    (void)GPIO_Init(GPIO_PORT_B, GPIO_PIN_01, &stcGpioInit);

    /* PB11 set to GPIO-Output */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinDir = PIN_DIR_OUT;
    stcGpioInit.u16PinAttr = PIN_ATTR_DIGITAL;
    (void)GPIO_Init(GPIO_PORT_B, GPIO_PIN_11, &stcGpioInit);

    /* PB12 set to GPIO-Output */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinDir = PIN_DIR_OUT;
    stcGpioInit.u16PinDrv = PIN_HIGH_DRV;
    stcGpioInit.u16PinAttr = PIN_ATTR_DIGITAL;
    (void)GPIO_Init(GPIO_PORT_B, GPIO_PIN_12, &stcGpioInit);

    /* PB14 set to USBHS-DM */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinAttr = PIN_ATTR_ANALOG;
    (void)GPIO_Init(GPIO_PORT_B, GPIO_PIN_14, &stcGpioInit);

    /* PB15 set to USBHS-DP */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinAttr = PIN_ATTR_ANALOG;
    (void)GPIO_Init(GPIO_PORT_B, GPIO_PIN_15, &stcGpioInit);

    /* PG8 set to EIRQ8 */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16ExtInt = PIN_EXTINT_ON;
    stcGpioInit.u16PullUp = PIN_PU_ON;
    (void)GPIO_Init(GPIO_PORT_G, GPIO_PIN_08, &stcGpioInit);

    /* PA11 set to USBFS-DM */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinAttr = PIN_ATTR_ANALOG;
    (void)GPIO_Init(GPIO_PORT_A, GPIO_PIN_11, &stcGpioInit);

    /* PA12 set to USBFS-DP */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinAttr = PIN_ATTR_ANALOG;
    (void)GPIO_Init(GPIO_PORT_A, GPIO_PIN_12, &stcGpioInit);

    /* PD6 set to GPIO-Output */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinDir = PIN_DIR_OUT;
    stcGpioInit.u16PinAttr = PIN_ATTR_DIGITAL;
    (void)GPIO_Init(GPIO_PORT_D, GPIO_PIN_06, &stcGpioInit);

    /* PB7 set to GPIO-Output */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinDir = PIN_DIR_OUT;
    stcGpioInit.u16PinAttr = PIN_ATTR_DIGITAL;
    (void)GPIO_Init(GPIO_PORT_B, GPIO_PIN_07, &stcGpioInit);

    /* PI13/MD set to GPIO-Input */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinAttr = PIN_ATTR_DIGITAL;
    (void)GPIO_Init(GPIO_PORT_I, GPIO_PIN_13, &stcGpioInit);

    /* PB9 set to GPIO-Output */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinDir = PIN_DIR_OUT;
    stcGpioInit.u16PinAttr = PIN_ATTR_DIGITAL;
    (void)GPIO_Init(GPIO_PORT_B, GPIO_PIN_09, &stcGpioInit);

    /* PA4 set to ADC12-IN4 */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinAttr = PIN_ATTR_ANALOG;
    (void)GPIO_Init(GPIO_PORT_A, GPIO_PIN_04, &stcGpioInit);

    GPIO_SetFunc(GPIO_PORT_E,GPIO_PIN_02,GPIO_FUNC_63);//CAN2-RX
    
    GPIO_SetFunc(GPIO_PORT_E,GPIO_PIN_03,GPIO_FUNC_62);//CAN2-TX
    
    GPIO_SetFunc(GPIO_PORT_E,GPIO_PIN_04,GPIO_FUNC_37);//USART6-RX
    
    GPIO_SetFunc(GPIO_PORT_E,GPIO_PIN_05,GPIO_FUNC_7);//USART6-RTS
    
    GPIO_SetFunc(GPIO_PORT_E,GPIO_PIN_06,GPIO_FUNC_36);//USART6-TX
    
    GPIO_SetFunc(GPIO_PORT_F,GPIO_PIN_00,GPIO_FUNC_12);//EXMC-ADD0
    
    GPIO_SetFunc(GPIO_PORT_F,GPIO_PIN_01,GPIO_FUNC_12);//EXMC-ADD1
    
    GPIO_SetFunc(GPIO_PORT_F,GPIO_PIN_02,GPIO_FUNC_12);//EXMC-ADD2
    
    GPIO_SetFunc(GPIO_PORT_F,GPIO_PIN_03,GPIO_FUNC_12);//EXMC-ADD3
    
    GPIO_SetFunc(GPIO_PORT_F,GPIO_PIN_04,GPIO_FUNC_12);//EXMC-ADD4
    
    GPIO_SetFunc(GPIO_PORT_F,GPIO_PIN_05,GPIO_FUNC_12);//EXMC-ADD5
    
    GPIO_SetFunc(GPIO_PORT_F,GPIO_PIN_06,GPIO_FUNC_20);//USART7-RX
    
    GPIO_SetFunc(GPIO_PORT_F,GPIO_PIN_07,GPIO_FUNC_20);//USART7-TX
    
    GPIO_SetFunc(GPIO_PORT_C,GPIO_PIN_01,GPIO_FUNC_11);//ETH-SMI-MDC
    
    GPIO_SetFunc(GPIO_PORT_C,GPIO_PIN_02,GPIO_FUNC_33);//USART3-RX
    
    GPIO_SetFunc(GPIO_PORT_C,GPIO_PIN_03,GPIO_FUNC_32);//USART3-TX
    
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_00,GPIO_FUNC_11);//ETH-MII-CRS
    
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_01,GPIO_FUNC_11);//ETH-MII-RMII-RXCLK
    
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_02,GPIO_FUNC_11);//ETH-SMI-MDIO
    
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_03,GPIO_FUNC_11);//ETH-MII-COL
    
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_07,GPIO_FUNC_11);//ETH-MII-RMII-RXDV
    
    GPIO_SetFunc(GPIO_PORT_C,GPIO_PIN_04,GPIO_FUNC_11);//ETH-MII-RMII-RXD0
    
    GPIO_SetFunc(GPIO_PORT_C,GPIO_PIN_05,GPIO_FUNC_11);//ETH-MII-RMII-RXD1
    
    GPIO_SetFunc(GPIO_PORT_B,GPIO_PIN_00,GPIO_FUNC_18);//SPI1-NSS3
    
    GPIO_SetFunc(GPIO_PORT_B,GPIO_PIN_02,GPIO_FUNC_35);//USART2-RX
    
    GPIO_SetFunc(GPIO_PORT_F,GPIO_PIN_11,GPIO_FUNC_34);//USART2-TX
    
    GPIO_SetFunc(GPIO_PORT_F,GPIO_PIN_12,GPIO_FUNC_12);//EXMC-ADD6
    
    GPIO_SetFunc(GPIO_PORT_F,GPIO_PIN_13,GPIO_FUNC_12);//EXMC-ADD7
    
    GPIO_SetFunc(GPIO_PORT_F,GPIO_PIN_14,GPIO_FUNC_12);//EXMC-ADD8
    
    GPIO_SetFunc(GPIO_PORT_F,GPIO_PIN_15,GPIO_FUNC_12);//EXMC-ADD9
    
    GPIO_SetFunc(GPIO_PORT_G,GPIO_PIN_00,GPIO_FUNC_12);//EXMC-ADD10
    
    GPIO_SetFunc(GPIO_PORT_G,GPIO_PIN_01,GPIO_FUNC_12);//EXMC-ADD11
    
    GPIO_SetFunc(GPIO_PORT_E,GPIO_PIN_07,GPIO_FUNC_12);//EXMC-DATA4
    
    GPIO_SetFunc(GPIO_PORT_E,GPIO_PIN_08,GPIO_FUNC_12);//EXMC-DATA5
    
    GPIO_SetFunc(GPIO_PORT_E,GPIO_PIN_09,GPIO_FUNC_12);//EXMC-DATA6
    
    GPIO_SetFunc(GPIO_PORT_E,GPIO_PIN_10,GPIO_FUNC_12);//EXMC-DATA7
    
    GPIO_SetFunc(GPIO_PORT_E,GPIO_PIN_11,GPIO_FUNC_12);//EXMC-DATA8
    
    GPIO_SetFunc(GPIO_PORT_E,GPIO_PIN_12,GPIO_FUNC_12);//EXMC-DATA9
    
    GPIO_SetFunc(GPIO_PORT_E,GPIO_PIN_13,GPIO_FUNC_12);//EXMC-DATA10
    
    GPIO_SetFunc(GPIO_PORT_E,GPIO_PIN_14,GPIO_FUNC_12);//EXMC-DATA11
    
    GPIO_SetFunc(GPIO_PORT_E,GPIO_PIN_15,GPIO_FUNC_12);//EXMC-DATA12
    
    GPIO_SetFunc(GPIO_PORT_B,GPIO_PIN_10,GPIO_FUNC_11);//ETH-MII-RXER
    
    GPIO_SetFunc(GPIO_PORT_B,GPIO_PIN_13,GPIO_FUNC_12);//USBHS-VBUS
    
    GPIO_SetFunc(GPIO_PORT_D,GPIO_PIN_08,GPIO_FUNC_12);//EXMC-DATA13
    
    GPIO_SetFunc(GPIO_PORT_D,GPIO_PIN_09,GPIO_FUNC_12);//EXMC-DATA14
    
    GPIO_SetFunc(GPIO_PORT_D,GPIO_PIN_10,GPIO_FUNC_12);//EXMC-DATA15
    
    GPIO_SetFunc(GPIO_PORT_D,GPIO_PIN_11,GPIO_FUNC_12);//EXMC-ADD16
    
    GPIO_SetFunc(GPIO_PORT_D,GPIO_PIN_12,GPIO_FUNC_12);//EXMC-ADD17
    
    GPIO_SetFunc(GPIO_PORT_D,GPIO_PIN_13,GPIO_FUNC_7);//USART9-RTS
    
    GPIO_SetFunc(GPIO_PORT_D,GPIO_PIN_14,GPIO_FUNC_12);//EXMC-DATA0
    
    GPIO_SetFunc(GPIO_PORT_D,GPIO_PIN_15,GPIO_FUNC_12);//EXMC-DATA1
    
    GPIO_SetFunc(GPIO_PORT_G,GPIO_PIN_02,GPIO_FUNC_12);//EXMC-ADD12
    
    GPIO_SetFunc(GPIO_PORT_G,GPIO_PIN_03,GPIO_FUNC_36);//USART9-TX
    
    GPIO_SetFunc(GPIO_PORT_G,GPIO_PIN_04,GPIO_FUNC_37);//USART9-RX
    
    GPIO_SetFunc(GPIO_PORT_G,GPIO_PIN_05,GPIO_FUNC_50);//I2C2-SDA
    
    GPIO_SetFunc(GPIO_PORT_G,GPIO_PIN_06,GPIO_FUNC_51);//I2C2-SCL
    
    GPIO_SetFunc(GPIO_PORT_G,GPIO_PIN_07,GPIO_FUNC_40);//SPI1-SCK
    
    GPIO_SetFunc(GPIO_PORT_C,GPIO_PIN_06,GPIO_FUNC_42);//SPI1-MISO
    
    GPIO_SetFunc(GPIO_PORT_C,GPIO_PIN_07,GPIO_FUNC_41);//SPI1-MOSI
    
    GPIO_SetFunc(GPIO_PORT_C,GPIO_PIN_08,GPIO_FUNC_52);//I2C4-SDA
    
    GPIO_SetFunc(GPIO_PORT_C,GPIO_PIN_09,GPIO_FUNC_53);//I2C4-SCL
    
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_08,GPIO_FUNC_9);//SDIO1-D1
    
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_09,GPIO_FUNC_10);//USBFS-VBUS
    
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_10,GPIO_FUNC_9);//SDIO1-CD
    
    GPIO_SetDebugPort(GPIO_PIN_TDI, DISABLE);
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_15,GPIO_FUNC_19);//SPI1-NSS0
    
    GPIO_SetFunc(GPIO_PORT_C,GPIO_PIN_10,GPIO_FUNC_9);//SDIO1-D2
    
    GPIO_SetFunc(GPIO_PORT_C,GPIO_PIN_11,GPIO_FUNC_9);//SDIO1-D3
    
    GPIO_SetFunc(GPIO_PORT_C,GPIO_PIN_12,GPIO_FUNC_9);//SDIO1-CK
    
    GPIO_SetFunc(GPIO_PORT_D,GPIO_PIN_00,GPIO_FUNC_12);//EXMC-DATA2
    
    GPIO_SetFunc(GPIO_PORT_D,GPIO_PIN_01,GPIO_FUNC_12);//EXMC-DATA3
    
    GPIO_SetFunc(GPIO_PORT_D,GPIO_PIN_02,GPIO_FUNC_9);//SDIO1-CMD
    
    GPIO_SetFunc(GPIO_PORT_D,GPIO_PIN_03,GPIO_FUNC_12);//EXMC-CLK
    
    GPIO_SetFunc(GPIO_PORT_D,GPIO_PIN_04,GPIO_FUNC_12);//EXMC-OE
    
    GPIO_SetFunc(GPIO_PORT_D,GPIO_PIN_05,GPIO_FUNC_12);//EXMC-WE
    
    GPIO_SetFunc(GPIO_PORT_D,GPIO_PIN_07,GPIO_FUNC_12);//EXMC-CE0
    
    GPIO_SetFunc(GPIO_PORT_G,GPIO_PIN_09,GPIO_FUNC_12);//EXMC-CE1
    
    GPIO_SetFunc(GPIO_PORT_G,GPIO_PIN_10,GPIO_FUNC_12);//EXMC-CE2
    
    GPIO_SetFunc(GPIO_PORT_G,GPIO_PIN_11,GPIO_FUNC_11);//ETH-MII-RMII-TXEN
    
    GPIO_SetFunc(GPIO_PORT_G,GPIO_PIN_12,GPIO_FUNC_12);//EXMC-CE3
    
    GPIO_SetFunc(GPIO_PORT_G,GPIO_PIN_13,GPIO_FUNC_11);//ETH-MII-RMII-TXD0
    
    GPIO_SetFunc(GPIO_PORT_G,GPIO_PIN_14,GPIO_FUNC_11);//ETH-MII-RMII-TXD1
    
    GPIO_SetFunc(GPIO_PORT_G,GPIO_PIN_15,GPIO_FUNC_12);//EXMC-BAA
    
    GPIO_SetDebugPort(GPIO_PIN_TRST, DISABLE);
    GPIO_SetFunc(GPIO_PORT_B,GPIO_PIN_04,GPIO_FUNC_9);//SDIO1-D0
    
    GPIO_SetFunc(GPIO_PORT_B,GPIO_PIN_05,GPIO_FUNC_12);//EXMC-ALE
    
    GPIO_SetFunc(GPIO_PORT_B,GPIO_PIN_06,GPIO_FUNC_11);//ETH-MII-TXCLK
    
    GPIO_SetFunc(GPIO_PORT_E,GPIO_PIN_00,GPIO_FUNC_12);//EXMC-CE4
    
    GPIO_SetFunc(GPIO_PORT_E,GPIO_PIN_01,GPIO_FUNC_12);//EXMC-CE5
    
    GPIO_SetFunc(GPIO_PORT_I,GPIO_PIN_12,GPIO_FUNC_12);//EXMC-CLE
    
}

//Int Config
static void App_IntCfg(void)
{
    stc_irq_signin_config_t stcIrq;

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_PORT_EIRQ8;
    stcIrq.enIRQn = INT032_IRQn;
    stcIrq.pfnCallback = &INT_SRC_PORT_EIRQ8_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT032_IRQn);
    NVIC_SetPriority(INT032_IRQn, DDL_IRQ_PRIO_06);
    NVIC_EnableIRQ(INT032_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_PORT_EIRQ0;
    stcIrq.enIRQn = INT033_IRQn;
    stcIrq.pfnCallback = &INT_SRC_PORT_EIRQ0_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT033_IRQn);
    NVIC_SetPriority(INT033_IRQn, DDL_IRQ_PRIO_09);
    NVIC_EnableIRQ(INT033_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_USART2_RTO;
    stcIrq.enIRQn = INT086_IRQn;
    stcIrq.pfnCallback = &INT_SRC_USART2_RTO_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT086_IRQn);
    NVIC_SetPriority(INT086_IRQn, DDL_IRQ_PRIO_10);
    NVIC_EnableIRQ(INT086_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_USART3_TCI;
    stcIrq.enIRQn = INT000_IRQn;
    stcIrq.pfnCallback = &INT_SRC_USART3_TCI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT000_IRQn);
    NVIC_SetPriority(INT000_IRQn, DDL_IRQ_PRIO_07);
    NVIC_EnableIRQ(INT000_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_USART3_RI;
    stcIrq.enIRQn = INT001_IRQn;
    stcIrq.pfnCallback = &INT_SRC_USART3_RI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT001_IRQn);
    NVIC_SetPriority(INT001_IRQn, DDL_IRQ_PRIO_07);
    NVIC_EnableIRQ(INT001_IRQn);

    (void)INTC_ShareIrqCmd(INT_SRC_USART3_EI, ENABLE);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_USART6_TCI;
    stcIrq.enIRQn = INT098_IRQn;
    stcIrq.pfnCallback = &INT_SRC_USART6_TCI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT098_IRQn);
    NVIC_SetPriority(INT098_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT098_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_USART6_RTO;
    stcIrq.enIRQn = INT099_IRQn;
    stcIrq.pfnCallback = &INT_SRC_USART6_RTO_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT099_IRQn);
    NVIC_SetPriority(INT099_IRQn, DDL_IRQ_PRIO_10);
    NVIC_EnableIRQ(INT099_IRQn);

    (void)INTC_ShareIrqCmd(INT_SRC_USART6_EI, ENABLE);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_USART9_TCI;
    stcIrq.enIRQn = INT110_IRQn;
    stcIrq.pfnCallback = &INT_SRC_USART9_TCI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT110_IRQn);
    NVIC_SetPriority(INT110_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT110_IRQn);

    (void)INTC_ShareIrqCmd(INT_SRC_USART9_EI, ENABLE);

    (void)INTC_ShareIrqCmd(INT_SRC_SPI1_SPEI, ENABLE);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_SPI1_SPTI;
    stcIrq.enIRQn = INT088_IRQn;
    stcIrq.pfnCallback = &INT_SRC_SPI1_SPTI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT088_IRQn);
    NVIC_SetPriority(INT088_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT088_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_SPI1_SPRI;
    stcIrq.enIRQn = INT089_IRQn;
    stcIrq.pfnCallback = &INT_SRC_SPI1_SPRI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT089_IRQn);
    NVIC_SetPriority(INT089_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT089_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_USART2_RI;
    stcIrq.enIRQn = INT090_IRQn;
    stcIrq.pfnCallback = &INT_SRC_USART2_RI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT090_IRQn);
    NVIC_SetPriority(INT090_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT090_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_USART6_RI;
    stcIrq.enIRQn = INT101_IRQn;
    stcIrq.pfnCallback = &INT_SRC_USART6_RI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT101_IRQn);
    NVIC_SetPriority(INT101_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT101_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_USART9_RI;
    stcIrq.enIRQn = INT112_IRQn;
    stcIrq.pfnCallback = &INT_SRC_USART9_RI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT112_IRQn);
    NVIC_SetPriority(INT112_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT112_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_RTC_ALM;
    stcIrq.enIRQn = INT050_IRQn;
    stcIrq.pfnCallback = &INT_SRC_RTC_ALM_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT050_IRQn);
    NVIC_SetPriority(INT050_IRQn, DDL_IRQ_PRIO_06);
    NVIC_EnableIRQ(INT050_IRQn);

    (void)INTC_ShareIrqCmd(INT_SRC_I2C2_EEI, ENABLE);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_I2C2_RXI;
    stcIrq.enIRQn = INT114_IRQn;
    stcIrq.pfnCallback = &INT_SRC_I2C2_RXI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT114_IRQn);
    NVIC_SetPriority(INT114_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT114_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_I2C2_TXI;
    stcIrq.enIRQn = INT115_IRQn;
    stcIrq.pfnCallback = &INT_SRC_I2C2_TXI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT115_IRQn);
    NVIC_SetPriority(INT115_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT115_IRQn);

    (void)INTC_ShareIrqCmd(INT_SRC_I2C4_EEI, ENABLE);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_I2C4_TXI;
    stcIrq.enIRQn = INT117_IRQn;
    stcIrq.pfnCallback = &INT_SRC_I2C4_TXI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT117_IRQn);
    NVIC_SetPriority(INT117_IRQn, DDL_IRQ_PRIO_06);
    NVIC_EnableIRQ(INT117_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_I2C4_RXI;
    stcIrq.enIRQn = INT118_IRQn;
    stcIrq.pfnCallback = &INT_SRC_I2C4_RXI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT118_IRQn);
    NVIC_SetPriority(INT118_IRQn, DDL_IRQ_PRIO_06);
    NVIC_EnableIRQ(INT118_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA1_TC0;
    stcIrq.enIRQn = INT002_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA1_TC0_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT002_IRQn);
    NVIC_SetPriority(INT002_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT002_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA1_TC1;
    stcIrq.enIRQn = INT003_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA1_TC1_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT003_IRQn);
    NVIC_SetPriority(INT003_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT003_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA1_TC2;
    stcIrq.enIRQn = INT038_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA1_TC2_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT038_IRQn);
    NVIC_SetPriority(INT038_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT038_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA1_TC3;
    stcIrq.enIRQn = INT039_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA1_TC3_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT039_IRQn);
    NVIC_SetPriority(INT039_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT039_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA1_TC4;
    stcIrq.enIRQn = INT040_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA1_TC4_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT040_IRQn);
    NVIC_SetPriority(INT040_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT040_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA1_TC5;
    stcIrq.enIRQn = INT041_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA1_TC5_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT041_IRQn);
    NVIC_SetPriority(INT041_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT041_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA1_TC6;
    stcIrq.enIRQn = INT042_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA1_TC6_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT042_IRQn);
    NVIC_SetPriority(INT042_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT042_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA1_TC7;
    stcIrq.enIRQn = INT043_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA1_TC7_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT043_IRQn);
    NVIC_SetPriority(INT043_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT043_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA2_TC0;
    stcIrq.enIRQn = INT004_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA2_TC0_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT004_IRQn);
    NVIC_SetPriority(INT004_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT004_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA2_TC1;
    stcIrq.enIRQn = INT005_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA2_TC1_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT005_IRQn);
    NVIC_SetPriority(INT005_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT005_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA2_TC2;
    stcIrq.enIRQn = INT044_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA2_TC2_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT044_IRQn);
    NVIC_SetPriority(INT044_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT044_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA2_TC3;
    stcIrq.enIRQn = INT045_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA2_TC3_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT045_IRQn);
    NVIC_SetPriority(INT045_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT045_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA2_TC4;
    stcIrq.enIRQn = INT046_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA2_TC4_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT046_IRQn);
    NVIC_SetPriority(INT046_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT046_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA2_TC5;
    stcIrq.enIRQn = INT047_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA2_TC5_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT047_IRQn);
    NVIC_SetPriority(INT047_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT047_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA2_TC6;
    stcIrq.enIRQn = INT048_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA2_TC6_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT048_IRQn);
    NVIC_SetPriority(INT048_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT048_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA2_TC7;
    stcIrq.enIRQn = INT049_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA2_TC7_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT049_IRQn);
    NVIC_SetPriority(INT049_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT049_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_CAN2_HOST;
    stcIrq.enIRQn = INT093_IRQn;
    stcIrq.pfnCallback = &INT_SRC_CAN2_HOST_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT093_IRQn);
    NVIC_SetPriority(INT093_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT093_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_USART2_TCI;
    stcIrq.enIRQn = INT087_IRQn;
    stcIrq.pfnCallback = &INT_SRC_USART2_TCI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT087_IRQn);
    NVIC_SetPriority(INT087_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT087_IRQn);

    (void)INTC_ShareIrqCmd(INT_SRC_USART2_EI, ENABLE);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_RTC_PRD;
    stcIrq.enIRQn = INT051_IRQn;
    stcIrq.pfnCallback = &INT_SRC_RTC_PRD_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT051_IRQn);
    NVIC_SetPriority(INT051_IRQn, DDL_IRQ_PRIO_06);
    NVIC_EnableIRQ(INT051_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_SPI1_SPII;
    stcIrq.enIRQn = INT091_IRQn;
    stcIrq.pfnCallback = &INT_SRC_SPI1_SPII_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT091_IRQn);
    NVIC_SetPriority(INT091_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT091_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_TMR2_1_CMP_A;
    stcIrq.enIRQn = INT052_IRQn;
    stcIrq.pfnCallback = &INT_SRC_TMR2_1_CMP_A_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT052_IRQn);
    NVIC_SetPriority(INT052_IRQn, DDL_IRQ_PRIO_06);
    NVIC_EnableIRQ(INT052_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_USART7_RTO;
    stcIrq.enIRQn = INT104_IRQn;
    stcIrq.pfnCallback = &INT_SRC_USART7_RTO_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT104_IRQn);
    NVIC_SetPriority(INT104_IRQn, DDL_IRQ_PRIO_10);
    NVIC_EnableIRQ(INT104_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_USART7_EI;
    stcIrq.enIRQn = INT105_IRQn;
    stcIrq.pfnCallback = &INT_SRC_USART7_EI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT105_IRQn);
    NVIC_SetPriority(INT105_IRQn, DDL_IRQ_PRIO_04);
    NVIC_EnableIRQ(INT105_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_USART7_TCI;
    stcIrq.enIRQn = INT106_IRQn;
    stcIrq.pfnCallback = &INT_SRC_USART7_TCI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT106_IRQn);
    NVIC_SetPriority(INT106_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT106_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_USART7_RI;
    stcIrq.enIRQn = INT107_IRQn;
    stcIrq.pfnCallback = &INT_SRC_USART7_RI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT107_IRQn);
    NVIC_SetPriority(INT107_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT107_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_I2C4_TEI;
    stcIrq.enIRQn = INT116_IRQn;
    stcIrq.pfnCallback = &INT_SRC_I2C4_TEI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT116_IRQn);
    NVIC_SetPriority(INT116_IRQn, DDL_IRQ_PRIO_06);
    NVIC_EnableIRQ(INT116_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_I2C2_TEI;
    stcIrq.enIRQn = INT111_IRQn;
    stcIrq.pfnCallback = &INT_SRC_I2C2_TEI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT111_IRQn);
    NVIC_SetPriority(INT111_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT111_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_TMR2_2_CMP_A;
    stcIrq.enIRQn = INT053_IRQn;
    stcIrq.pfnCallback = &INT_SRC_TMR2_2_CMP_A_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT053_IRQn);
    NVIC_SetPriority(INT053_IRQn, DDL_IRQ_PRIO_12);
    NVIC_EnableIRQ(INT053_IRQn);

    /* ShareIrq NVIC config */
    NVIC_ClearPendingIRQ(INT138_IRQn);
    NVIC_SetPriority(INT138_IRQn, DDL_IRQ_PRIO_04);
    NVIC_EnableIRQ(INT138_IRQn);

    /* ShareIrq NVIC config */
    NVIC_ClearPendingIRQ(INT139_IRQn);
    NVIC_SetPriority(INT139_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT139_IRQn);

    /* ShareIrq NVIC config */
    NVIC_ClearPendingIRQ(INT141_IRQn);
    NVIC_SetPriority(INT141_IRQn, DDL_IRQ_PRIO_04);
    NVIC_EnableIRQ(INT141_IRQn);

    /* ShareIrq NVIC config */
    NVIC_ClearPendingIRQ(INT137_IRQn);
    NVIC_SetPriority(INT137_IRQn, DDL_IRQ_PRIO_04);
    NVIC_EnableIRQ(INT137_IRQn);

    /* ShareIrq NVIC config */
    NVIC_ClearPendingIRQ(INT142_IRQn);
    NVIC_SetPriority(INT142_IRQn, DDL_IRQ_PRIO_04);
    NVIC_EnableIRQ(INT142_IRQn);

}

//Dma Config
static void App_DmaCfg(void)
{
    /* DMA1 FCG enable */
    FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_DMA1, ENABLE);
    /* DMA2 FCG enable */
    FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_DMA2, ENABLE);
    /* AOS FCG enable */
    FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_AOS, ENABLE);

    stc_dma_init_t stcDmaInit;

    /* DMA1_CH0 Config */
    AOS_SetTriggerEventSrc(AOS_DMA1_0, EVT_SRC_USART3_TI);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_INC;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_FIX;

    (void)DMA_Init(CM_DMA1, DMA_CH0, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA1, DMA_INT_TC_CH0);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA1, DMA_CH0, ENABLE);

    /* DMA1_CH1 Config */
    AOS_SetTriggerEventSrc(AOS_DMA1_1, EVT_SRC_USART9_RI);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_FIX;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_INC;

    (void)DMA_Init(CM_DMA1, DMA_CH1, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA1, DMA_INT_TC_CH1);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA1, DMA_CH1, ENABLE);

    /* DMA1_CH2 Config */
    AOS_SetTriggerEventSrc(AOS_DMA1_2, EVT_SRC_USART6_RI);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_FIX;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_INC;

    (void)DMA_Init(CM_DMA1, DMA_CH2, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA1, DMA_INT_TC_CH2);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA1, DMA_CH2, ENABLE);

    /* DMA1_CH3 Config */
    AOS_SetTriggerEventSrc(AOS_DMA1_3, EVT_SRC_USART2_RI);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_FIX;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_INC;

    (void)DMA_Init(CM_DMA1, DMA_CH3, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA1, DMA_INT_TC_CH3);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA1, DMA_CH3, ENABLE);

    /* DMA1_CH4 Config */
    AOS_SetTriggerEventSrc(AOS_DMA1_4, EVT_SRC_SPI1_SPTI);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_INC;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_FIX;

    (void)DMA_Init(CM_DMA1, DMA_CH4, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA1, DMA_INT_TC_CH4);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA1, DMA_CH4, ENABLE);

    /* DMA1_CH5 Config */
    AOS_SetTriggerEventSrc(AOS_DMA1_5, EVT_SRC_SDIOC1_DMAR);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_FIX;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_INC;

    (void)DMA_Init(CM_DMA1, DMA_CH5, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA1, DMA_INT_TC_CH5);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA1, DMA_CH5, ENABLE);

    /* DMA1_CH6 Config */
    AOS_SetTriggerEventSrc(AOS_DMA1_6, EVT_SRC_SDIOC1_DMAW);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_INC;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_FIX;

    (void)DMA_Init(CM_DMA1, DMA_CH6, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA1, DMA_INT_TC_CH6);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA1, DMA_CH6, ENABLE);

    /* DMA1_CH7 Config */
    AOS_SetTriggerEventSrc(AOS_DMA1_7, EVT_SRC_TRNG_END);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_FIX;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_FIX;

    (void)DMA_Init(CM_DMA1, DMA_CH7, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA1, DMA_INT_TC_CH7);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA1, DMA_CH7, ENABLE);

    /* DMA2_CH0 Config */
    AOS_SetTriggerEventSrc(AOS_DMA2_0, EVT_SRC_SPI1_SPRI);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_FIX;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_INC;

    (void)DMA_Init(CM_DMA2, DMA_CH0, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA2, DMA_INT_TC_CH0);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA2, DMA_CH0, ENABLE);

    /* DMA2_CH1 Config */
    AOS_SetTriggerEventSrc(AOS_DMA2_1, EVT_SRC_USART9_TI);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_INC;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_FIX;

    (void)DMA_Init(CM_DMA2, DMA_CH1, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA2, DMA_INT_TC_CH1);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA2, DMA_CH1, ENABLE);

    /* DMA2_CH2 Config */
    AOS_SetTriggerEventSrc(AOS_DMA2_2, EVT_SRC_I2C2_RXI);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_FIX;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_INC;

    (void)DMA_Init(CM_DMA2, DMA_CH2, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA2, DMA_INT_TC_CH2);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA2, DMA_CH2, ENABLE);

    /* DMA2_CH3 Config */
    AOS_SetTriggerEventSrc(AOS_DMA2_3, EVT_SRC_I2C2_TXI);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_INC;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_FIX;

    (void)DMA_Init(CM_DMA2, DMA_CH3, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA2, DMA_INT_TC_CH3);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA2, DMA_CH3, ENABLE);

    /* DMA2_CH4 Config */
    AOS_SetTriggerEventSrc(AOS_DMA2_4, EVT_SRC_USBFS_SOF);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_INC;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_FIX;

    (void)DMA_Init(CM_DMA2, DMA_CH4, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA2, DMA_INT_TC_CH4);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA2, DMA_CH4, ENABLE);

    /* DMA2_CH5 Config */
    AOS_SetTriggerEventSrc(AOS_DMA2_5, EVT_SRC_USBHS_SOF);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_INC;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_FIX;

    (void)DMA_Init(CM_DMA2, DMA_CH5, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA2, DMA_INT_TC_CH5);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA2, DMA_CH5, ENABLE);

    /* DMA2_CH6 Config */
    AOS_SetTriggerEventSrc(AOS_DMA2_6, EVT_SRC_USART2_TI);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_INC;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_FIX;

    (void)DMA_Init(CM_DMA2, DMA_CH6, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA2, DMA_INT_TC_CH6);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA2, DMA_CH6, ENABLE);

    /* DMA2_CH7 Config */
    AOS_SetTriggerEventSrc(AOS_DMA2_7, EVT_SRC_USART6_TI);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_INC;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_FIX;

    (void)DMA_Init(CM_DMA2, DMA_CH7, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA2, DMA_INT_TC_CH7);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA2, DMA_CH7, ENABLE);

    /* DMA module enable */
    DMA_Cmd(CM_DMA1, ENABLE);
    /* DMA module enable */
    DMA_Cmd(CM_DMA2, ENABLE);
}
/**
 * @brief  Main function of the project
 * @param  None
 * @retval int32_t return value, if needed
 */
int32_t main(void)
{
    /* Register write unprotected for some required peripherals. */
    LL_PERIPH_WE(LL_PERIPH_ALL);
    //Clock Config
    App_ClkCfg();
    //Port Config
    App_PortCfg();
    //Int Config
    App_IntCfg();
    //EIRQ Config
    App_EIRQCfg();
    //SDIOx Config
    App_SDIOxCfg();
    //USB_FS Config
    App_USB_FSCfg();
    //USB_HS Config
    App_USB_HSCfg();
    //ETHMAC Config
    App_ETHMACCfg();
    //EXMC Config
    App_EXMCCfg();
    //Timer2 Config
    App_Timer2Cfg();
    //Timer0 Config
    App_Timer0Cfg();
    //USARTx Config
    App_USARTxCfg();
    //I2Cx Config
    App_I2CxCfg();
    //SPIx Config
    App_SPIxCfg();
    //RTC Config
    App_RTCCfg();
    //CANx Config
    App_CANxCfg();
    //SWDT Config
    App_SWDTCfg();
    //Dma Config
    App_DmaCfg();
    /* Register write protected for some required peripherals. */
    LL_PERIPH_WP(LL_PERIPH_ALL);
    for (;;) {

    }
}

/* INT_SRC_PORT_EIRQ8 Callback. */
static void INT_SRC_PORT_EIRQ8_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_PORT_EIRQ0 Callback. */
static void INT_SRC_PORT_EIRQ0_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_USART2_RTO Callback. */
static void INT_SRC_USART2_RTO_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_USART3_TCI Callback. */
static void INT_SRC_USART3_TCI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_USART3_RI Callback. */
static void INT_SRC_USART3_RI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_USART3_EI Callback. */
void USART3_RxError_IrqHandler(void)
{
    //add your codes here
}
/* INT_SRC_USART6_TCI Callback. */
static void INT_SRC_USART6_TCI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_USART6_RTO Callback. */
static void INT_SRC_USART6_RTO_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_USART6_EI Callback. */
void USART6_RxError_IrqHandler(void)
{
    //add your codes here
}
/* INT_SRC_USART9_TCI Callback. */
static void INT_SRC_USART9_TCI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_USART9_EI Callback. */
void USART9_RxError_IrqHandler(void)
{
    //add your codes here
}
/* INT_SRC_SPI1_SPEI Callback. */
void SPI1_Error_IrqHandler(void)
{
    //add your codes here
}
/* INT_SRC_SPI1_SPTI Callback. */
static void INT_SRC_SPI1_SPTI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_SPI1_SPRI Callback. */
static void INT_SRC_SPI1_SPRI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_USART2_RI Callback. */
static void INT_SRC_USART2_RI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_USART6_RI Callback. */
static void INT_SRC_USART6_RI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_USART9_RI Callback. */
static void INT_SRC_USART9_RI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_RTC_ALM Callback. */
static void INT_SRC_RTC_ALM_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_I2C2_EEI Callback. */
void I2C2_EE_IrqHandler(void)
{
    //add your codes here
}
/* INT_SRC_I2C2_RXI Callback. */
static void INT_SRC_I2C2_RXI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_I2C2_TXI Callback. */
static void INT_SRC_I2C2_TXI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_I2C4_EEI Callback. */
void I2C4_EE_IrqHandler(void)
{
    //add your codes here
}
/* INT_SRC_I2C4_TXI Callback. */
static void INT_SRC_I2C4_TXI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_I2C4_RXI Callback. */
static void INT_SRC_I2C4_RXI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA1_TC0 Callback. */
static void INT_SRC_DMA1_TC0_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA1_TC1 Callback. */
static void INT_SRC_DMA1_TC1_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA1_TC2 Callback. */
static void INT_SRC_DMA1_TC2_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA1_TC3 Callback. */
static void INT_SRC_DMA1_TC3_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA1_TC4 Callback. */
static void INT_SRC_DMA1_TC4_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA1_TC5 Callback. */
static void INT_SRC_DMA1_TC5_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA1_TC6 Callback. */
static void INT_SRC_DMA1_TC6_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA1_TC7 Callback. */
static void INT_SRC_DMA1_TC7_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA2_TC0 Callback. */
static void INT_SRC_DMA2_TC0_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA2_TC1 Callback. */
static void INT_SRC_DMA2_TC1_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA2_TC2 Callback. */
static void INT_SRC_DMA2_TC2_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA2_TC3 Callback. */
static void INT_SRC_DMA2_TC3_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA2_TC4 Callback. */
static void INT_SRC_DMA2_TC4_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA2_TC5 Callback. */
static void INT_SRC_DMA2_TC5_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA2_TC6 Callback. */
static void INT_SRC_DMA2_TC6_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA2_TC7 Callback. */
static void INT_SRC_DMA2_TC7_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_CAN2_HOST Callback. */
static void INT_SRC_CAN2_HOST_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_USART2_TCI Callback. */
static void INT_SRC_USART2_TCI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_USART2_EI Callback. */
void USART2_RxError_IrqHandler(void)
{
    //add your codes here
}
/* INT_SRC_RTC_PRD Callback. */
static void INT_SRC_RTC_PRD_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_SPI1_SPII Callback. */
static void INT_SRC_SPI1_SPII_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_TMR2_1_CMP_A Callback. */
static void INT_SRC_TMR2_1_CMP_A_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_USART7_RTO Callback. */
static void INT_SRC_USART7_RTO_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_USART7_EI Callback. */
static void INT_SRC_USART7_EI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_USART7_TCI Callback. */
static void INT_SRC_USART7_TCI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_USART7_RI Callback. */
static void INT_SRC_USART7_RI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_I2C4_TEI Callback. */
static void INT_SRC_I2C4_TEI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_I2C2_TEI Callback. */
static void INT_SRC_I2C2_TEI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_TMR2_2_CMP_A Callback. */
static void INT_SRC_TMR2_2_CMP_A_IrqCallback(void)
{
    //add your codes here
}

//EIRQ Config
static void App_EIRQCfg(void)
{
    stc_extint_init_t stcExtIntInit;

    /* EXTINT_CH00 config */
    (void)EXTINT_StructInit(&stcExtIntInit);
    stcExtIntInit.u32Filter = EXTINT_FILTER_ON;
    stcExtIntInit.u32FilterClock = EXTINT_FCLK_DIV1;
    stcExtIntInit.u32Edge = EXTINT_TRIG_LOW;
    stcExtIntInit.u32FilterB = NMI_EXTINT_FILTER_B_ON;
    stcExtIntInit.u32FilterBClock = NMI_EXTINT_FCLK_B_500NS;
    (void)EXTINT_Init(EXTINT_CH00, &stcExtIntInit);

    /* EXTINT_CH08 config */
    (void)EXTINT_StructInit(&stcExtIntInit);
    stcExtIntInit.u32Filter = EXTINT_FILTER_ON;
    stcExtIntInit.u32FilterClock = EXTINT_FCLK_DIV1;
    stcExtIntInit.u32Edge = EXTINT_TRIG_LOW;
    stcExtIntInit.u32FilterB = NMI_EXTINT_FILTER_B_ON;
    stcExtIntInit.u32FilterBClock = NMI_EXTINT_FCLK_B_500NS;
    (void)EXTINT_Init(EXTINT_CH08, &stcExtIntInit);

}

//SDIOx Config
static void App_SDIOxCfg(void)
{
}

//USB_FS Config
static void App_USB_FSCfg(void)
{
}

//USB_HS Config
static void App_USB_HSCfg(void)
{
}

//ETHMAC Config
static void App_ETHMACCfg(void)
{
}

//EXMC Config
static void App_EXMCCfg(void)
{
}

//Timer2 Config
static void App_Timer2Cfg(void)
{
    stc_tmr2_init_t stcTmr2Init;
    stc_tmr2_pwm_init_t stcPwmInit;

    /* Enable AOS clock */
    FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_AOS, ENABLE);
    /* Timer2 trigger event set */
    AOS_SetTriggerEventSrc(AOS_TMR2, EVT_SRC_TMR2_1_CMP_A);

    /* Enable timer2_1 clock */
    FCG_Fcg2PeriphClockCmd(FCG2_PERIPH_TMR2_1, ENABLE);

    /* Enable timer2_2 clock */
    FCG_Fcg2PeriphClockCmd(FCG2_PERIPH_TMR2_2, ENABLE);

    /************************* Configure TMR2_1_A***************************/
    (void)TMR2_StructInit(&stcTmr2Init);
    stcTmr2Init.u32ClockSrc     = TMR2_CLK_PCLK1;
    stcTmr2Init.u32ClockDiv     = TMR2_CLK_DIV8;
    stcTmr2Init.u32Func         = TMR2_FUNC_CMP;
    stcTmr2Init.u32CompareValue = 0x3A98U;
    (void)TMR2_Init(CM_TMR2_1, TMR2_CH_A, &stcTmr2Init);

    /* Enable the specified interrupts of Timer2. */
    TMR2_IntCmd(CM_TMR2_1, TMR2_INT_MATCH_CH_A, ENABLE);

    /* PWM configuration */
    (void)TMR2_PWM_StructInit(&stcPwmInit);
    stcPwmInit.u32StartPolarity = TMR2_PWM_HOLD;
    stcPwmInit.u32StopPolarity = TMR2_PWM_LOW;
    stcPwmInit.u32CompareMatchPolarity = TMR2_PWM_LOW;
    (void)TMR2_PWM_Init(CM_TMR2_1, TMR2_CH_A, &stcPwmInit);
    TMR2_PWM_OutputCmd(CM_TMR2_1, TMR2_CH_A, ENABLE);

    /* Config hardware start */
    TMR2_HWStartCondCmd(CM_TMR2_1, TMR2_CH_A, TMR2_START_COND_EVT, ENABLE);

    /* Config hardware clear */
    TMR2_HWClearCondCmd(CM_TMR2_1, TMR2_CH_A, TMR2_CLR_COND_EVT, ENABLE);

    /************************* Configure TMR2_2_A***************************/
    (void)TMR2_StructInit(&stcTmr2Init);
    stcTmr2Init.u32ClockSrc     = TMR2_CLK_PCLK1;
    stcTmr2Init.u32ClockDiv     = TMR2_CLK_DIV32;
    stcTmr2Init.u32Func         = TMR2_FUNC_CMP;
    stcTmr2Init.u32CompareValue = 0x493EU;
    (void)TMR2_Init(CM_TMR2_2, TMR2_CH_A, &stcTmr2Init);

    /* Enable the specified interrupts of Timer2. */
    TMR2_IntCmd(CM_TMR2_2, TMR2_INT_MATCH_CH_A, ENABLE);

    /* PWM configuration */
    (void)TMR2_PWM_StructInit(&stcPwmInit);
    stcPwmInit.u32StartPolarity = TMR2_PWM_HOLD;
    stcPwmInit.u32StopPolarity = TMR2_PWM_LOW;
    stcPwmInit.u32CompareMatchPolarity = TMR2_PWM_LOW;
    (void)TMR2_PWM_Init(CM_TMR2_2, TMR2_CH_A, &stcPwmInit);
    TMR2_PWM_OutputCmd(CM_TMR2_2, TMR2_CH_A, ENABLE);

    /* Starts Timer2 */
    TMR2_Start(CM_TMR2_2, TMR2_CH_A);
}

//Timer0 Config
static void App_Timer0Cfg(void)
{
    stc_tmr0_init_t stcTmr0Init;

    /* Enable AOS clock */
    FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_AOS, ENABLE);
    /* Timer0 trigger event set */
    AOS_SetTriggerEventSrc(AOS_TMR0, EVT_SRC_PORT_EIRQ0);

    /* Enable timer0_1 clock */
    FCG_Fcg2PeriphClockCmd(FCG2_PERIPH_TMR0_1, ENABLE);

    /* Enable timer0_2 clock */
    FCG_Fcg2PeriphClockCmd(FCG2_PERIPH_TMR0_2, ENABLE);

    /************************* Configure TMR0_1_B***************************/
    (void)TMR0_StructInit(&stcTmr0Init);
    stcTmr0Init.u32ClockSrc = TMR0_CLK_SRC_XTAL32;
    stcTmr0Init.u32ClockDiv = TMR0_CLK_DIV1;
    stcTmr0Init.u32Func = TMR0_FUNC_CMP;
    stcTmr0Init.u16CompareValue = (20U - 4U);
    (void)TMR0_Init(CM_TMR0_1, TMR0_CH_B, &stcTmr0Init);
    DDL_DelayMS(1U);
    TMR0_HWStartCondCmd(CM_TMR0_1, TMR0_CH_B, ENABLE);
    DDL_DelayMS(1U);
    TMR0_HWClearCondCmd(CM_TMR0_1, TMR0_CH_B, ENABLE);
    DDL_DelayMS(1U);

    /************************* Configure TMR0_2_A***************************/
    (void)TMR0_StructInit(&stcTmr0Init);
    stcTmr0Init.u32ClockSrc = TMR0_CLK_SRC_XTAL32;
    stcTmr0Init.u32ClockDiv = TMR0_CLK_DIV1;
    stcTmr0Init.u32Func = TMR0_FUNC_CMP;
    stcTmr0Init.u16CompareValue = (20U - 4U);
    (void)TMR0_Init(CM_TMR0_2, TMR0_CH_A, &stcTmr0Init);
    DDL_DelayMS(1U);
    TMR0_HWStartCondCmd(CM_TMR0_2, TMR0_CH_A, ENABLE);
    DDL_DelayMS(1U);
    TMR0_HWClearCondCmd(CM_TMR0_2, TMR0_CH_A, ENABLE);
    DDL_DelayMS(1U);

    /************************* Configure TMR0_2_B***************************/
    (void)TMR0_StructInit(&stcTmr0Init);
    stcTmr0Init.u32ClockSrc = TMR0_CLK_SRC_XTAL32;
    stcTmr0Init.u32ClockDiv = TMR0_CLK_DIV1;
    stcTmr0Init.u32Func = TMR0_FUNC_CMP;
    stcTmr0Init.u16CompareValue = (9600U - 4U);
    (void)TMR0_Init(CM_TMR0_2, TMR0_CH_B, &stcTmr0Init);
    DDL_DelayMS(1U);
    TMR0_HWStartCondCmd(CM_TMR0_2, TMR0_CH_B, ENABLE);
    DDL_DelayMS(1U);
    TMR0_HWClearCondCmd(CM_TMR0_2, TMR0_CH_B, ENABLE);
    DDL_DelayMS(1U);
}

//USARTx Config
static void App_USARTxCfg(void)
{
    stc_usart_uart_init_t stcUartInit;

    /* Enable USART2 clock */
    FCG_Fcg3PeriphClockCmd(FCG3_PERIPH_USART2, ENABLE);
    /************************* Configure USART2***************************/
    USART_DeInit(CM_USART2);
    (void)USART_UART_StructInit(&stcUartInit);
    stcUartInit.u32ClockSrc = USART_CLK_SRC_INTERNCLK;
    stcUartInit.u32ClockDiv = USART_CLK_DIV1;
    stcUartInit.u32CKOutput = USART_CK_OUTPUT_DISABLE;
    stcUartInit.u32Baudrate = 115200UL;
    stcUartInit.u32DataWidth = USART_DATA_WIDTH_8BIT;
    stcUartInit.u32StopBit = USART_STOPBIT_1BIT;
    stcUartInit.u32Parity = USART_PARITY_NONE;
    stcUartInit.u32OverSampleBit = USART_OVER_SAMPLE_16BIT;
    stcUartInit.u32FirstBit = USART_FIRST_BIT_LSB;
    stcUartInit.u32StartBitPolarity = USART_START_BIT_FALLING;
    stcUartInit.u32HWFlowControl = USART_HW_FLOWCTRL_NONE;
    USART_UART_Init(CM_USART2, &stcUartInit, NULL);
    USART_FilterCmd(CM_USART2, ENABLE);
    /* Enable USART_TX | USART_RX | USART_RX_TIMEOUT | USART_INT_TX_CPLT | USART_INT_RX | USART_INT_RX_TIMEOUT function */
    USART_FuncCmd(CM_USART2, (USART_TX | USART_RX | USART_RX_TIMEOUT | USART_INT_TX_CPLT | USART_INT_RX | USART_INT_RX_TIMEOUT), ENABLE);

    /* Enable USART3 clock */
    FCG_Fcg3PeriphClockCmd(FCG3_PERIPH_USART3, ENABLE);
    /************************* Configure USART3***************************/
    USART_DeInit(CM_USART3);
    (void)USART_UART_StructInit(&stcUartInit);
    stcUartInit.u32ClockSrc = USART_CLK_SRC_INTERNCLK;
    stcUartInit.u32ClockDiv = USART_CLK_DIV1;
    stcUartInit.u32CKOutput = USART_CK_OUTPUT_DISABLE;
    stcUartInit.u32Baudrate = 1843200UL;
    stcUartInit.u32DataWidth = USART_DATA_WIDTH_8BIT;
    stcUartInit.u32StopBit = USART_STOPBIT_1BIT;
    stcUartInit.u32Parity = USART_PARITY_NONE;
    stcUartInit.u32OverSampleBit = USART_OVER_SAMPLE_16BIT;
    stcUartInit.u32FirstBit = USART_FIRST_BIT_LSB;
    stcUartInit.u32StartBitPolarity = USART_START_BIT_FALLING;
    stcUartInit.u32HWFlowControl = USART_HW_FLOWCTRL_NONE;
    USART_UART_Init(CM_USART3, &stcUartInit, NULL);
    USART_FilterCmd(CM_USART3, ENABLE);
    /* Enable USART_TX | USART_RX | USART_INT_TX_CPLT | USART_INT_RX function */
    USART_FuncCmd(CM_USART3, (USART_TX | USART_RX | USART_INT_TX_CPLT | USART_INT_RX), ENABLE);

    /* Enable USART6 clock */
    FCG_Fcg3PeriphClockCmd(FCG3_PERIPH_USART6, ENABLE);
    /************************* Configure USART6***************************/
    USART_DeInit(CM_USART6);
    (void)USART_UART_StructInit(&stcUartInit);
    stcUartInit.u32ClockSrc = USART_CLK_SRC_INTERNCLK;
    stcUartInit.u32ClockDiv = USART_CLK_DIV1;
    stcUartInit.u32CKOutput = USART_CK_OUTPUT_DISABLE;
    stcUartInit.u32Baudrate = 115200UL;
    stcUartInit.u32DataWidth = USART_DATA_WIDTH_8BIT;
    stcUartInit.u32StopBit = USART_STOPBIT_1BIT;
    stcUartInit.u32Parity = USART_PARITY_NONE;
    stcUartInit.u32OverSampleBit = USART_OVER_SAMPLE_16BIT;
    stcUartInit.u32FirstBit = USART_FIRST_BIT_LSB;
    stcUartInit.u32StartBitPolarity = USART_START_BIT_FALLING;
    stcUartInit.u32HWFlowControl = USART_HW_FLOWCTRL_RTS;
    USART_UART_Init(CM_USART6, &stcUartInit, NULL);
    USART_FilterCmd(CM_USART6, ENABLE);
    /* Enable USART_TX | USART_RX | USART_RX_TIMEOUT | USART_INT_TX_CPLT | USART_INT_RX | USART_INT_RX_TIMEOUT function */
    USART_FuncCmd(CM_USART6, (USART_TX | USART_RX | USART_RX_TIMEOUT | USART_INT_TX_CPLT | USART_INT_RX | USART_INT_RX_TIMEOUT), ENABLE);

    /* Enable USART7 clock */
    FCG_Fcg3PeriphClockCmd(FCG3_PERIPH_USART7, ENABLE);
    /************************* Configure USART7***************************/
    USART_DeInit(CM_USART7);
    (void)USART_UART_StructInit(&stcUartInit);
    stcUartInit.u32ClockSrc = USART_CLK_SRC_INTERNCLK;
    stcUartInit.u32ClockDiv = USART_CLK_DIV1;
    stcUartInit.u32CKOutput = USART_CK_OUTPUT_DISABLE;
    stcUartInit.u32Baudrate = 115200UL;
    stcUartInit.u32DataWidth = USART_DATA_WIDTH_8BIT;
    stcUartInit.u32StopBit = USART_STOPBIT_1BIT;
    stcUartInit.u32Parity = USART_PARITY_NONE;
    stcUartInit.u32OverSampleBit = USART_OVER_SAMPLE_16BIT;
    stcUartInit.u32FirstBit = USART_FIRST_BIT_LSB;
    stcUartInit.u32StartBitPolarity = USART_START_BIT_FALLING;
    stcUartInit.u32HWFlowControl = USART_HW_FLOWCTRL_NONE;
    USART_UART_Init(CM_USART7, &stcUartInit, NULL);
    USART_FilterCmd(CM_USART7, ENABLE);
    /* Enable USART_TX | USART_RX | USART_RX_TIMEOUT | USART_INT_TX_CPLT | USART_INT_RX | USART_INT_RX_TIMEOUT function */
    USART_FuncCmd(CM_USART7, (USART_TX | USART_RX | USART_RX_TIMEOUT | USART_INT_TX_CPLT | USART_INT_RX | USART_INT_RX_TIMEOUT), ENABLE);

    /* Enable USART9 clock */
    FCG_Fcg3PeriphClockCmd(FCG3_PERIPH_USART9, ENABLE);
    /************************* Configure USART9***************************/
    USART_DeInit(CM_USART9);
    (void)USART_UART_StructInit(&stcUartInit);
    stcUartInit.u32ClockSrc = USART_CLK_SRC_INTERNCLK;
    stcUartInit.u32ClockDiv = USART_CLK_DIV1;
    stcUartInit.u32CKOutput = USART_CK_OUTPUT_DISABLE;
    stcUartInit.u32Baudrate = 460800UL;
    stcUartInit.u32DataWidth = USART_DATA_WIDTH_8BIT;
    stcUartInit.u32StopBit = USART_STOPBIT_1BIT;
    stcUartInit.u32Parity = USART_PARITY_NONE;
    stcUartInit.u32OverSampleBit = USART_OVER_SAMPLE_16BIT;
    stcUartInit.u32FirstBit = USART_FIRST_BIT_LSB;
    stcUartInit.u32StartBitPolarity = USART_START_BIT_FALLING;
    stcUartInit.u32HWFlowControl = USART_HW_FLOWCTRL_RTS;
    USART_UART_Init(CM_USART9, &stcUartInit, NULL);
    USART_FilterCmd(CM_USART9, ENABLE);
    /* Enable USART_TX | USART_RX | USART_INT_TX_CPLT | USART_INT_RX function */
    USART_FuncCmd(CM_USART9, (USART_TX | USART_RX | USART_INT_TX_CPLT | USART_INT_RX), ENABLE);
}

//I2Cx Config
static void App_I2CxCfg(void)
{
    int32_t i32Ret;
    stc_i2c_init_t stcI2cInit;
    float32_t fErr;

    /* Enable I2C2 clock */
    FCG_Fcg1PeriphClockCmd(FCG1_PERIPH_I2C2, ENABLE);
    /************************* Configure I2C2***************************/
    I2C_DeInit(CM_I2C2);

    (void)I2C_StructInit(&stcI2cInit);
    stcI2cInit.u32ClockDiv = I2C_CLK_DIV1;
    stcI2cInit.u32Baudrate = 400000UL;
    stcI2cInit.u32SclTime = 0UL;
    i32Ret = I2C_Init(CM_I2C2, &stcI2cInit, &fErr);
    if (LL_OK != i32Ret) {
        //Initialized failed, add your code here.
    }
    I2C_BusWaitCmd(CM_I2C2, ENABLE);


    /* Enable interrupt function*/
    I2C_IntCmd(CM_I2C2, I2C_INT_TX_CPLT | I2C_INT_RX_FULL | I2C_INT_TX_EMPTY | I2C_INT_TMOUTIE, ENABLE);

    /* Enable I2C4 clock */
    FCG_Fcg1PeriphClockCmd(FCG1_PERIPH_I2C4, ENABLE);
    /************************* Configure I2C4***************************/
    I2C_DeInit(CM_I2C4);

    (void)I2C_StructInit(&stcI2cInit);
    stcI2cInit.u32ClockDiv = I2C_CLK_DIV1;
    stcI2cInit.u32Baudrate = 400000UL;
    stcI2cInit.u32SclTime = 0UL;
    i32Ret = I2C_Init(CM_I2C4, &stcI2cInit, &fErr);
    if (LL_OK != i32Ret) {
        //Initialized failed, add your code here.
    }
    I2C_BusWaitCmd(CM_I2C4, ENABLE);


    /* Enable interrupt function*/
    I2C_IntCmd(CM_I2C4, I2C_INT_TX_CPLT | I2C_INT_RX_FULL | I2C_INT_TX_EMPTY | I2C_INT_TMOUTIE, ENABLE);
}

//SPIx Config
static void App_SPIxCfg(void)
{
    stc_spi_init_t stcSpiInit;
    stc_spi_delay_t stcSpiDelay;

    /* Enable SPI1 clock */
    FCG_Fcg1PeriphClockCmd(FCG1_PERIPH_SPI1, ENABLE);
    /************************* Configure SPI1***************************/
    SPI_StructInit(&stcSpiInit);
    stcSpiInit.u32WireMode = SPI_4_WIRE;
    stcSpiInit.u32TransMode = SPI_FULL_DUPLEX;
    stcSpiInit.u32MasterSlave = SPI_MASTER;
    stcSpiInit.u32Parity = SPI_PARITY_INVD;
    stcSpiInit.u32SpiMode = SPI_MD_3;
    stcSpiInit.u32BaudRatePrescaler = SPI_BR_CLK_DIV256;
    stcSpiInit.u32DataBits = SPI_DATA_SIZE_8BIT;
    stcSpiInit.u32FirstBit = SPI_FIRST_MSB;
    stcSpiInit.u32SuspendMode = SPI_COM_SUSP_FUNC_OFF;
    stcSpiInit.u32FrameLevel = SPI_1_FRAME;
    (void)SPI_Init(CM_SPI1, &stcSpiInit);

    SPI_DelayStructInit(&stcSpiDelay);
    stcSpiDelay.u32IntervalDelay = SPI_INTERVAL_TIME_1SCK;
    stcSpiDelay.u32ReleaseDelay = SPI_RELEASE_TIME_1SCK;
    stcSpiDelay.u32SetupDelay = SPI_SETUP_TIME_1SCK;
    (void)SPI_DelayTimeConfig(CM_SPI1, &stcSpiDelay);

    /* SPI loopback function configuration */
    SPI_LoopbackModeConfig(CM_SPI1, SPI_LOOPBACK_INVD);
    /* SPI parity check error self diagnosis configuration */
    SPI_ParityCheckCmd(CM_SPI1, DISABLE);
    /* SPI valid SS signal configuration */
    SPI_SSPinSelect(CM_SPI1, SPI_PIN_SS0);
    /* SPI SS signal valid level configuration */
    SPI_SSValidLevelConfig(CM_SPI1, SPI_PIN_SS0, DISABLE);
    /* Enable interrupt function*/
    SPI_IntCmd(CM_SPI1, SPI_INT_IDLE | SPI_INT_RX_BUF_FULL | SPI_INT_TX_BUF_EMPTY | SPI_INT_ERR, ENABLE);
    /* Enable SPI1 */
    SPI_Cmd(CM_SPI1, ENABLE);
}

//RTC Config
static void App_RTCCfg(void)
{
    stc_rtc_init_t stcRtcInit;
    stc_rtc_alarm_t stcRtcAlarm;

    /* Reset RTC counter */
    if (LL_ERR_TIMEOUT != RTC_DeInit()) {
        /* Configure structure initialization */
        (void)RTC_StructInit(&stcRtcInit);

        /* Configuration RTC structure */
        stcRtcInit.u8ClockSrc = RTC_CLK_SRC_XTAL32;
        stcRtcInit.u8HourFormat = RTC_HOUR_FMT_24H;
        stcRtcInit.u8IntPeriod = RTC_INT_PERIOD_PER_HOUR;
        stcRtcInit.u8ClockCompen = RTC_CLK_COMPEN_DISABLE;
        (void)RTC_Init(&stcRtcInit);

        /* Configuration alarm clock time */
        stcRtcAlarm.u8AlarmHour = 0x12U;
        stcRtcAlarm.u8AlarmMinute = 0x0U;
        stcRtcAlarm.u8AlarmWeekday = RTC_ALARM_WEEKDAY_SUNDAY | RTC_ALARM_WEEKDAY_MONDAY | RTC_ALARM_WEEKDAY_TUESDAY | RTC_ALARM_WEEKDAY_WEDNESDAY | RTC_ALARM_WEEKDAY_THURSDAY | RTC_ALARM_WEEKDAY_FRIDAY | RTC_ALARM_WEEKDAY_SATURDAY;
        stcRtcAlarm.u8AlarmAmPm = RTC_HOUR_12H_PM;
        (void)RTC_SetAlarm(RTC_DATA_FMT_BCD, &stcRtcAlarm);
        RTC_AlarmCmd(ENABLE);

        /* Enable RTC interrupt */
        RTC_IntCmd(RTC_INT_PERIOD | RTC_INT_ALARM, ENABLE);
        /* Startup RTC count */
        RTC_Cmd(ENABLE);
    }
}

//CANx Config
static void App_CANxCfg(void)
{
    stc_can_init_t stcCanInit;
    stc_canfd_config_t stcCanFd;
    stc_can_ttc_config_t stcCanTtc;

    /************************* Configure CAN2***************************/
    CLK_SetCANClockSrc(CLK_CAN2, CLK_CANCLK_XTAL);

    /* Initializes CAN. */
    (void)CAN_StructInit(&stcCanInit);
    stcCanInit.stcBitCfg.u32Prescaler = 1U;
    stcCanInit.stcBitCfg.u32TimeSeg1  = 8U;
    stcCanInit.stcBitCfg.u32TimeSeg2  = 2U;
    stcCanInit.stcBitCfg.u32SJW       = 2U;
    stcCanInit.u8WorkMode             = CAN_WORK_MD_NORMAL;
    stcCanInit.u8PTBSingleShotTx      = CAN_PTB_SINGLESHOT_TX_DISABLE;
    stcCanInit.u8STBSingleShotTx      = CAN_STB_SINGLESHOT_TX_DISABLE;
    stcCanInit.u8STBPrioMode          = CAN_STB_PRIO_MD_DISABLE;
    stcCanInit.u8RxWarnLimit          = 1U;
    stcCanInit.u8ErrorWarnLimit       = 11U;
    stcCanInit.u8RxAllFrame           = CAN_RX_ALL_FRAME_DISABLE;
    stcCanInit.u8RxOvfMode            = CAN_RX_OVF_SAVE_NEW;

    /* CAN-FD configuration. */
    (void)CAN_FD_StructInit(&stcCanFd);
    stcCanFd.stcBitCfg.u32Prescaler   = 1U;
    stcCanFd.stcBitCfg.u32TimeSeg1    = 8U;
    stcCanFd.stcBitCfg.u32TimeSeg2    = 2U;
    stcCanFd.stcBitCfg.u32SJW         = 2U;
    stcCanFd.u8Mode                   = CAN_FD_MD_ISO;
    stcCanFd.u8TDC                    = CAN_FD_TDC_ENABLE;
    stcCanFd.u8SSPOffset              = 8U;
    stcCanInit.pstcCanFd              = &stcCanFd;

    /* CAN_TTC configuration. */
    (void)CAN_TTC_StructInit(&stcCanTtc);
    stcCanTtc.u32RefMsgID             = 0x0UL;
    stcCanTtc.u32RefMsgIDE            = 1U;
    stcCanTtc.u8NTUPrescaler          = CAN_TTC_NTU_PRESCALER1;
    stcCanTtc.u8TxBufMode             = CAN_TTC_TX_BUF_MD_TTCAN;
    stcCanTtc.u16TriggerType          = CAN_TTC_TRIG_IMMED_TRIG;
    stcCanTtc.u16TxEnableWindow       = 16U;
    stcCanTtc.u16TxTriggerTime        = 0xFFFFU;
    stcCanTtc.u16WatchTriggerTime     = 0xFFFFU;
    stcCanInit.pstcCanTtc             = &stcCanTtc;

    /* Enable peripheral clock of CAN2. */
    FCG_Fcg1PeriphClockCmd(FCG1_PERIPH_CAN2, ENABLE);
    (void)CAN_Init(CM_CAN2, &stcCanInit);
    /* Enable the interrupts, the status flags can be read. */
    CAN_IntCmd(CM_CAN2, CAN_INT_ALL, DISABLE);
    CAN_IntCmd(CM_CAN2, CAN_INT_RX | CAN_INT_RX_OVERRUN | CAN_INT_RX_BUF_FULL | CAN_INT_RX_BUF_WARN | CAN_INT_PTB_TX | CAN_INT_STB_TX | CAN_INT_ERR_INT | CAN_INT_BUS_ERR | CAN_INT_ARBITR_LOST | CAN_INT_ERR_PASSIVE, ENABLE);
    CAN_TTC_IntCmd(CM_CAN2, CAN_TTC_INT_WATCH_TRIG | CAN_TTC_INT_TIME_TRIG, ENABLE);
    /* Enable TTCAN, local counter of TTCAN starts counting. */
    CAN_TTC_Cmd(CM_CAN2, ENABLE);
}

//SWDT Config
static void App_SWDTCfg(void)
{
    stc_swdt_init_t stcSwdtInit;

    /* SWDT configuration */
    stcSwdtInit.u32CountPeriod   = SWDT_CNT_PERIOD256;
    stcSwdtInit.u32ClockDiv      = SWDT_CLK_DIV32;
    stcSwdtInit.u32RefreshRange  = SWDT_RANGE_0TO100PCT;
    stcSwdtInit.u32LPMCount      = SWDT_LPM_CNT_STOP;
    stcSwdtInit.u32ExceptionType = SWDT_EXP_TYPE_RST;
    (void)SWDT_Init(&stcSwdtInit);

    /* First reload counter to start SWDT */
    SWDT_FeedDog();
}

/**
 * @}
 */

/**
 * @}
 */

/*******************************************************************************
 * EOF (not truncated)
 ******************************************************************************/
